New Karnaugh ICs method using Peano fractal

The classic method is used for the circuits minimization.
http://en.wikipedia.org/wiki/Karnaugh_map
The new method is based on the digital comparator logic.
http://en.wikipedia.org/wiki/Digital_comparator
Let’s suppose we want to compare to numbers M and N which have each of them, X bits(we can consider that X=max of the length of the number of bits for each of the two numbers: M and N).
The comparator electronic scheme, uses multiple parallel XOR gates. The XOR gates propose us the study of the XOR logic table.
We can extend this table – in the sense that now we are interested to see the result of the calculus M xor N.
If we build a table in which we will compute i xor j where i means the index of row and j the index of the column, that we can onbserve some repetition on that table.
We can find on this table some different class of fractals.

http://www.math.umass.edu/~mconnors/fractal/generate/peano.html

If we use the free program: Notepad++ and select a value for the file obtained generating the table XOR for all the row and column smaller than a value VAL than if we select a value, the program search automatically and highlight the value all over where it can be found.
By doing in this way for some example of values, we can see how the numbers are arranged in the XOR table – in this case on the lines of the Peano filligree:

The advantages of using the XOR table conssist in the way that when we want to compute (e.g. compare two numbers of X bits) the Karnaugh table for a circuit (e.g. the digital comparator), instead of taking into consideration the numbers M and N and calculate and complete all the 2^X rows, we can apply the same Karnaugh method but for some other numbers, let’s note them:A and B which have a binary representation(in base 2) with Y bits with Y < X.
On the drawing shown before we can conssider M and N the coordinates where is the mouse cursor; than M=19, N=17 and M xor N is 2.
The values of A and B can be any other pair of coordinates where AFor using this method we can see the the smallest values A and B must be computed with a modulo of 2^power opeartion.
To find some other coordinates not with the smallest values, we can substract 2^m where m=the bigger power of the number 2 for which 2^mOnly for this operation not finding the modulo remainder, we can see that each of the results: A=M-2^m and B=N-2^m have maximum X-1 bits, X = the max of the length of the binary representation of M and N.
In this way the Karnaugh table will have with 2^(1gained bit + 1 gained bit)=2^2 = 4 times lesser rows than the Karnaugh table obtained for some numbers M and N with X bits.
This method of generating the disjunctive form of the circuit repersented with gates must be used dynamically, because the method depends of the numbers M and N and for each pair the result M xor N is not the same.
So for each number representing the result of the M xor N, this number having the meannig of number of bits in the Karnaugh table, the output scheme is different.
From here is the dynamic character of the method.
This means that the HW must contain a circuit with a matrix with gates and this gates to be connected in the moment of CPU execution; if we want to compare – for example the numbers 17 and 16 to select from the matrix of gates only the one that generate the output obtained from the Karnaugh method from A and B obtained from 17 and 16; for some others two numbers not 17 and 16 the output scheme will be different, not the same for all pairs like in the classic method.

>>In this way the time of execution will be a little bit slower but the consumption of energy of the ICs – especially the main CPU will be reduced.
The result can be: no usage of so big coolers and the possibility to increase the frequency of the circuits.